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21/12 Sugapriya T
Recruitment Specialist at Superior Talent India Pvt Ltd

Views:104 Applications:16 Rec. Actions:Recruiter Actions:0

DFT Design Engineer (4-9 yrs)

Bangalore Job Code: 8864

Job Description

- SCAN stuck-at and at-speed techniques.

- Fundamentals of SCAN stuck-at and at-speed techniques.

- Expertise in handling Mentor Graphics EDT logic.

- Knowledge on On chip clock controller (OCC).

- Pattern generation with Mentor Graphics TestKompress Tool.

- Good knowledge in BSCAN operations. Knowleedge in MBIST Operations.

- Expertise in handling Synopsys SMS tool sets (Integrator, Builder, Yield Accelerator).

- Excellent track of pattern simulation and coverage analysis (preferred cadence ncsim simulator expert Experience in ATPG, Scan, BIST and Mentor TestKompress.

- Expert in writing test benches (Verilog, system Verilog) and tests for different components like PLL, ADC etc for generating ATE vectors.

- Experienced engineers with DFT flow, ATPG, Scan, BIST and Mentor TestKompress.

- Experience with the mentor tool sets.

- Familiarity with scan, membist, jtag concepts and 3rd party tools. Tester program creation, debug, and validation of DFT features on ATE.

Salary: Not Disclosed by Recruiter

Industry: Semiconductors / Electronics

Functional Area: Engineering Design, R&D

Role Category: Engineering Design

Role: Design Engineer

Employment Type: Permanent Job, Full Time

Keyskills:

dftatpgbistncsimjtag

This job opening was posted long time back. It may not be active. Nor was it removed by the recruiter. Please use your discretion.

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