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13/09 Shivalila
Sr Recruiter at Open - Silicon

Views:234 Applications:8 Rec. Actions:Recruiter Actions:0

Open Silicon - Senior Physical Design Engineer - ASIC/RTL Design (5-20 yrs)

Bangalore Job Code: 20687

Job description :


- Should be able to technically lead a team and execute all aspects of RTL to GDS implementation for a Complex ASIC.

- Should be hand on and thorough in complex hierarchical chip Implementation.

- Should be able to breaks down the tasks, assign and track the progress.

- Should demonstrate problem solving, debug and mentorship skills.

- Should be able to work with cross functional teams and resolve cross functional dependencies.

- Should have strong communication skills. Should have experience in working with customers and vendors and should be able to articulate technical problems and find resolution.

- Experience is IP hardening like DDR/HBM/Serdes PHY

- Experience in 2.5D ASIC Design, Interposer design, Spice simulations, customer circuit design, SI/PI, Packaging & chiplet design is a big plus

This job opening was posted long time back. It may not be active. Nor was it removed by the recruiter. Please use your discretion.

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